EtherCAT Technology Group marks 10th meeting of Semiconductor Technical Working Group
August 2016
News
Recently, the Semiconductor Technical Working Group of the EtherCAT Technology Group (ETG) met for the 10th time. Strong participation in the working group yields significant results for the semiconductor industry. The high-level support of some of the industry’s biggest tool manufacturers demonstrates the high acceptance level of EtherCAT technology in the semiconductor manufacturing industry, and highlights the consistency with which the ETG develops industry-specific solutions together with its member companies.
The meeting, hosted by the ETG member company Lam Research, welcomed the 50 participants at its headquarters facility in Fremont, California. Just in time for the 10th meeting, a series of EtherCAT specification updates had been finalised, adding numerous extensions for the long-approved slave device standards as implemented in semiconductor manufacturing processes. Based on these updates, automated tests have also been optimised and prepared for approval. Another highlight of the meeting was the establishment of two new working groups, as subsets of the greater Semiconductor Technical Working Group, whose task is to define device profiles for chillers and VI probes (special voltage measuring systems). Furthermore, the semiconductor manufacturers announced strong interest on the part of large clients in the development of further specific device profiles.
The active member participation, the initiation of new profile development, as well as the demand for new profiles from customers, highlights the major impact the Semiconductor Technical Working Group has on suppliers and machine builders. Just some of the reasons for this include the fact that semiconductor-specific device profiles for a unique interface have been published in the past and currently serve as the basis for faster development of reliable machines for tool manufacturers. In addition to the currently available specifications and their extensions, a further benefit comes from how the working group, together with the ETG specialists, reliably makes new profile tests available in parallel to guarantee high quality EtherCAT implementations.
The next meeting of the ETG Semiconductor Technical Working Group is scheduled for October 2016 and will be hosted by industry heavyweight Applied Materials in Santa Clara, California.
For more information contact EtherCAT Technology Group, +49 911 540 56 226, [email protected], www.ethercat.org
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