Does an ideal bus technology exist? Many companies promote a single technology as the ideal bus that meets all application needs, but in actuality, each bus technology has its own strengths and weaknesses and thus is appropriate for different applications.
History has shown the folly of claiming an ideal bus for every application. Confident of the abilities of IEEE-1394 (FireWire) when it was still a year away from commercial roll-out, Hewlett-Packard opposed efforts to improve the widely accepted IEEE-488 standard. Publicly urging IEEE members to oppose revisions to improve the bandwidth of the IEEE-488 standard in a December 1997 press release, HP argued that "FireWire also shows great promise and offers far greater bandwidth than the proposed revisions. Why should our industry commit huge resources to a questionable extension of IEEE-488 when the computer industry is already developing excellent solutions for increased speed?"
Since then, the IEEE-488 standard continues to meet many customer needs (the IEEE-488.1-2003 revision increased the speed of the standard by eight times), and at the same time users have recognised the limitations to IEEE-1394. While IEEE-1394 is an effective bus technology for high-speed connectivity to digital camcorders, it has not achieved widespread acceptance in other applications, proving that an ideal bus does not exist. While each bus technology offers its strengths, the idea that a bus has no tradeoffs or limitations is an overstatement. Identifying the strengths of the various buses is a useful exercise for engineers in designing a test and measurement system.
Real-world systems include multiple communication buses, and it is the software framework that ties the disparate technologies together in an integrated system. Currently, many high-speed data buses have emerged as choices for test and measurement applications. This article examines the attributes of communication buses that influence their applicability and then compares and contrasts several popular technologies.
For evaluation of bus technologies for an application, engineers must consider key attributes such as latency, bandwidth, software support, distance support and availability. Latency and bandwidth, in particular, have a large impact on performance. Latency measures the delay of transmission of data across a bus, while bandwidth measures the rate at which data is sent across the bus, typically MBytes/s. When comparing an instrumentation bus to a highway road, the latency would correlate to the number of stoplights in the road, while the bandwidth would correlate to the width of the road and the speed of travel. Latency has a direct impact on applications such as digital multimeter (DMM) measurements, switching and instrument configuration. Bandwidth is important in applications such as waveform generation and acquisition as well as RF measurements. Figure 1 compares the latency and bandwidth provided by various buses.
Software support is an important factor because having the right tools delivers hardware abstraction and eases the integration of all instruments into a system. If an instrumentation bus specifies a standard driver software framework, engineers can take advantage of standard drivers for programming to ease system integration. Another factor to consider is distance support; some applications, such as antenna range testing, might physically require distance between measurement components. In addition, engineers should also consider the availability of connectivity to a bus from a PC as well as the availability of instruments for a specific bus. Finally, consider the cost of instruments available for the instrumentation bus.
Particularly well-suited for test and measurement, PCI Express is an evolution of PCI that greatly improves bandwidth with communication lanes of up to 4 Gbytes/s in each direction while still providing software compatibility with PCI. USB also has grown in popularity for its widespread availability and easy-to-use plug-and-play capabilities. LAN has emerged as a bus that is especially useful for distributed applications. Finally, GPIB has long been a successful instrumentation bus providing relatively low latency and a wide range of instrumentation.
PCI Express
Due to its high-speed performance, modular hardware architecture, and compatibility with PCI, PCI Express is ideally suited for test and measurement applications. PCI Express provides low latency as well as higher bus bandwidth, which, unlike PCI, LAN, USB, and GPIB, is not shared among devices. This higher bandwidth enables many new applications. With PCI Express, engineers can take advantage of a basic communication lane of 250 Mbytes/s in each direction with an x1 implementation up to 4 Gbytes/s with an x16 implementation, an increase of 24 times compared to PCI. This high bandwidth is especially useful for test and measurement in light of the growing popularity of virtual instrumentation.
With virtual instrumentation, engineers can create a user-defined system by combining modular hardware, development software and PC technologies. The software-defined approach affords greater flexibility than vendor-defined box instruments and because it is built on PC technologies has advanced in capability at a much faster rate. Modular hardware disaggregates instruments into individual measurement components so that engineers can combine components as needed to design their own custom measurements. This disaggregation requires a high-performing data link for streaming between the components. With higher bandwidth, PCI Express improves this achievable data streaming rate between components. In addition, PCI Express also improves peer-to-peer communication so that instruments within the system can quickly and easily communicate with each other. Lastly, PCI Express was designed with compatibility needs in mind. With a well-designed layered architecture, it ensures compatibility with future generations as well as software compatibility with PCI. The higher performance, modular hardware architecture, and compatibility give PCI Express the capability to solve many new applications.
PCI Express architecture
The PCI Express architecture is specified in layers, as shown in Figure 2, starting from the bottom, the physical layer, the data layer, the transaction layer, the software layer and the OS layer.
In the physical layer, PCI Express introduces the concept of multiple lanes to increase system bandwidth. The basic physical layer consists of a dual simplex channel implemented as a transmit pair and a receive pair that together make a lane. The initial speed of 2,5 Gbits/s provides a nominal bandwidth of about 250 MBytes/s in each direction per PCI Express lane representing a twofold to fourfold increase compared to most classic PCI devices. Unlike PCI where the bus bandwidth is shared among devices, this bandwidth is provided to each device. The bandwidth of a PCI Express link may be linearly scaled by adding signal pairs to form multiple lanes. The physical layer provides x1, x2, x4, x8, x12, x16 and x32 lane widths, which conceptually splits the incoming data packets among these lanes. Future performance enhancements, encoding techniques, or media would impact only the physical layer.
The link layer ensures reliable delivery of packets across the PCI Express link. By using a credit-based, flow control protocol, PCI Express ensures that packets are transmitted only when a buffer is available to receive this packet at the other end, eliminating any packet retries and the associated waste of bus bandwidth due to resource constraints. The link layer automatically retries a packet when signalled as corrupted.
The transaction layer uses a packet-based protocol. The transaction layer receives read and write requests from the software layer and creates request packets for transmission to the link layer. All requests are implemented as split transactions and some of the request packets require a response packet. The transaction layer also receives response packets from the link layer and matches these with the original software requests. Each packet has a unique identifier that enables response packets to be directed to the correct originator.
Software compatibility is of paramount importance for PCI Express. Compatibility with the PCI addressing model is maintained by the software layer to ensure that all existing applications and drivers operate unchanged. The PCI initialisation model where the OS can discover all add-in hardware devices present and then allocate system resources remains unchanged within the PCI Express architecture so that every OS can boot without modification on a PCI Express-based machine. The PCI Express architecture maintains the run-time software model used by PCI to enable all existing software to execute unchanged.
PCI Express adoption
Due to available bandwidth, cost-effectiveness and basis on the widespread PCI technology, there is already widespread commercial adoption of PCI Express. With the ability to meet growing bandwidth needs driven by video cards and data storage, PCI Express is an eagerly welcomed technology. In addition, large investment from companies such as Intel and Dell only furthers the adoption and drives the cost of PCI Express down. Finally, PCI Express adoption benefits from software compatibility with hundreds of millions of existing PCI interfaces.
With the commercial adoption of PCI Express, engineers can also expect the adoption of PCI Express for test and measurement. Vendors will apply PCI Express technology to the test and measurement industry so that engineers can benefit from the improved performance for their applications. With PCI Express adoption entering the PC market, CompactPCI and PXI manufacturers have begun work on integrating PCI Express into the specifications. While products are not expected until next year, the specification is nearing completion in the PCI Industrial Computer Manufacturers Group (PICMG) on CompactPCI Express (EXP.0), which brings PCI Express communication to the CompactPCI standard. The commercial adoption of PCI Express and the higher bandwidth will help drive the adoption for PCI Express for the test and measurement industry.
PCI Express compatibility
Because compatibility is of great importance, PCI Express was designed with an architecture that ensures software compatibility so that all OSs can boot without modification on a PCI Express-based machine. In addition, by maintaining the run-time software model of PCI, the PCI Express architecture allows all existing software to execute unchanged. With the software compatibility provided by PCI Express, engineers do not need to redesign their systems in order to take advantage of this new bus technology.
CompactPCI and PXI not only leverage PCI Express, but also provide compatibility with CompactPCI Express and PXI Express. With the software compatibility of PCI Express, the standard software framework provided by PXI will carry into PXI Express. To provide hardware compatibility, the new CompactPCI Express specification defines a new hybrid slot that gives engineers the ability to install modules with either a PCI or PCI Express architecture in a slot. With this technology, engineers and vendors can preserve their existing investments in PXI systems and products through both hardware and software compatibility.
Future PCI Express generations
Designed with future bandwidth needs in mind, PCI Express can increase bandwidth capabilities with future generations. With the PCI Express layered architecture, the specification makes provision for increasing bandwidth through the physical layer. The initial Generation 1 signalling frequency is 2,5 Gbits/s/direction, and this is expected to increase in line with advances in silicon technology up to 10 Gbits/s/direction, the practical maximum for signals in copper.
An example application that PCI Express can solve is high-speed video acquisition. In the past, engineers had to settle with the lower bandwidth available and depend on less reliable data to make a decision, or use a very expensive, proprietary system to meet bandwidth needs. With the superior bandwidth provided by PCI Express, engineers can acquire high-speed video with a more accurate and complete representation of the realtime event without the cost of a proprietary system. For instance, using the NI PCIe-1429 image acquisition card, engineers can acquire data at a rate of 680 MBits/s as opposed to using banks of expensive onboard memory that could acquire images only for short periods of time.
USB
USB has grown as a popular option for many test and measurement applications because of its easy-to-use plug and play capability, bandwidth abilities, and widespread availability of USB ports. Using a USB mouse or memory stick demonstrates how USB simplifies the connection and configuration of computer peripheral devices and the benefit of the plug-and-play capabilities. The release of USB 2.0 established a new category of high-speed devices that can reach a maximum transfer rate of 480 Mbits/s.
With the widespread availability of USB ports on computers, engineers can take advantage of the easy connection and configuration to quickly integrate USB devices in their system. Many USB devices are typically lower cost, and they are well suited for applications with portable measurements, laptop or desktop datalogging, and in-vehicle data acquisition or logging.
An example USB application is a low-cost, portable, data acquisition system. An engineer can develop a measurement application on a desktop using a USB data acquisition device and then deploy it on a laptop to take measurements in the field. For instance, using the NI USB-9211, a module with four isolated thermocouple inputs, an engineer can easily create a cost effective portable voltage and environmental measurement system.
LAN
LAN has been used for many years in test applications. Due to its ability to support larger distance needs, LAN is well suited for distributed applications or remote monitoring. 100BaseT LAN supports up to 85 metres without repeaters and, with repeaters, has no distance limits. Software standards for IEEE-488 commands for TCP-IP, such as VXI-11, provide a standard protocol for communicating with message-based LAN instruments.
Through LAN, engineers can network traditional instruments together for low frequency monitoring across wide areas or for distributed measurement applications. LXI (LAN eXtenstions for Instrumentation) is a specification underway to add triggering and compatibility standards to standalone LAN instruments. The emerging Gigabit Ethernet standard will increase the bandwidth of LAN instruments, but the latency of the bus will only incrementally improve. Therefore, LAN will continue to be most appropriate for application with modest throughput requirements such as low-speed distributed datalogging and traditional instrument control. Figure 1 provides a comparison of the throughput and latency of LAN and PCI Express.
An example LAN application is plant monitoring and automation. With the ability to support any distance need, LAN allows engineers to easily design a system that can monitor and control valves, actuators, and sensors across the plant floor. Using LAN, engineers can support and maintain this type of low frequency monitoring across a wide area.
Hybrid systems
Hybrid multiplatform test systems combine components from multiple ATE platforms such as PXI, PCI, GPIB, USB, and Ethernet into one system. An important piece to successfully integrating multiple buses into a system is properly architecting the system with a layered architecture, as shown in Figure 3. This architecture allows engineers to create a system that maximises existing investments in hardware and software and still integrate new bus technologies. A key part to this architecture is the top three layers, the software framework, which simplifies the integration, configuration and programming of multiple buses.
This allows engineers to take advantage of specific bus strengths for certain parts of the application to meet multiple requirements. For instance, in a RF communications application, an engineer could take advantage of the higher bandwidth and tighter timing and synchronisation available with PXI and PXI Express to connect a downconverter and digitiser, and then connect multiple similar measurement groups through LAN to support distance requirements. By integrating multiple buses together, engineers can take advantage of the strengths of each bus to create a more ideal test system.
While some companies claim that a single technology is the ideal bus for all application needs, each bus has its strengths and is suited for different applications. With the variety of bus technologies available, engineers should consider key bus attributes such as latency, bandwidth, software support, distance support, and availability when determining the appropriate bus for an application. By providing communication lanes of up to 4 Gbytes/s in each direction while still providing software compatibility with PCI, PCI Express is particularly well-suited for test and measurement. USB provides widespread availability and easy-to-use plug-and-play capabilities while LAN is appropriate for distributed applications with modest throughput requirements. Using a layered test architecture with an integrated software framework, engineers can meet varying system needs by integrating buses to create a hybrid multiplatform system.
For more information contact National Instruments, 0800 203 199.
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